1. Field of the Invention
The present invention relates to the field of silicon integrated circuits and integrated circuit fabrication, and more particularly, to the formation of resistive circuit elements within the silicon substrate having optimized temperature dependence.
2. Prior Art
Over the last twenty years, there have been numerous patents related to resistor elements for integrated circuits. Most of this work pertains to resistors formed in poly silicon. A subset of this work relates to the reduction of temperature dependence of these resistor elements. Since the issues of temperature variability in poly silicon resistors is different than for resistors implanted and/or diffused in crystalline silicon, these prior art patents are not relevant to the present invention.
For implanted or diffused resistors, most of the prior art patents date back to the 1970""s and even earlier. These older patents discuss techniques for reducing the temperature dependence of implanted resistors. These techniques include varying anneal temperatures, different dopant compensation schemes, neutral species implants, and others. Most of the preferred implementations use p-type resistors in n-type substrates, since PMOS was the dominant integrated circuit technology in the early 1970""s. Patents have not been found that address the reduction of temperature dependence by simply adjusting the n-type (phosphorus or arsenic) implant dose. Patents of background interest include U.S. Pat. No. 3,829,890 issued Aug. 13, 1974, xe2x80x9cIon Implanted Resistor and Method,xe2x80x9d U.S. Pat. No. 3,683,306 issued Aug. 8, 1972, xe2x80x9cTemperature Compensated Semiconductor Resistor Containing Neutral Inactive Impurities,xe2x80x9d U.S. Pat. No. 3,548,269 issued Dec. 15, 1970, xe2x80x9cResistive Layer Semiconductor Devicexe2x80x9d and U.S. Pat. No. 3,491,325 issued Jan. 20, 1970, xe2x80x9cTemperature Compensation for Semiconductor Devices.xe2x80x9d
In modern technologies, both CMOS and Bipolar, precision resistors are usually formed in poly silicon or, occasionally, by use of specialized metal films. These types of resistors are well isolated from the silicon substrate, resulting in low capacitance and good immunity from substrate bias.
Implanted bulk resistors are still used because of the relative process simplicity and typically superior matching characteristics. Often, implants that are already in the process are used to make a xe2x80x9cfreexe2x80x9d resistor. In the case where specialized resistor implants are added to the process, the implant dose is chosen to provide a reasonable sheet resistance, temperature dependence and process control within the existing process. It has not been recognized that the temperature dependence can be optimized while still maintaining sheet resistance values that are still within a desirable range.
N-type implanted resistors are formed within a conventional CMOS process with highly desirable sheet resistance (a few hundred ohms per square) and optimized temperature dependence: as little as 2% total variation across the industrial temperature range of xe2x88x9240 C to +85 C. This is achieved by only varying the dose of the resistor implant, with no specialized thermal cycles being used to activate the implanted resistor. Instead, the highly desirable sheet resistance and excellent temperature dependence are obtained using the existing thermal steps within a conventional CMOS process. Superior results are achieved using arsenic implantation as opposed to phosphorus implantation.